Sony wants to strengthen its leadership in the photographic sensor market and today presents an innovative solution for smartphones, a unique product of its kind because it is the first stacked CMOS image sensor with 2-Layer Transistor Pixel technology.
To differentiate it from the other stacked CMOS sensors is the arrangement of the photodiodes and pixel transistors: in the conventional stacked CMOS architecture, they are on the same substrate, in Sony’s they are separated and positioned on two different substrates (see image below). A technical device that benefits the quality of the images captured by the sensor.
Good to know: The conventional stacked type CMOS image sensor is characterized by a layered structure. The pixel chip, made up of backlit pixels, is superimposed on a logic layer enclosing the signal processing circuits. Inside the pixel chip, the photodiodes (they are used to convert light into electrical signals) and the pixel transistors (they control the signals) are placed side by side.
THE BENEFITS: WIDER DYNAMIC RANGE AND LESS DIGITAL NOISE
First advantage, thanks to the optimization of the photodiode and transistor layer, the saturation signal level is almost doubled compared to traditional image sensors, and this leads to an increase in the dynamic range.
Second improvement: since almost all transistors (excluding TGR – Transfer Gates, but applies to RST – Reset Transistors, SLE – Selection Transistors, and AMP – Amplification Transistors) no longer share the substrate with the photodiodes, it is possible to increase the size of the AMPs, a device that significantly reduces the digital noise typical of the night or poorly lit scenes.
Sony adds on the benefits:
The wider dynamic range and noise reduction achieved by the new technology prevents underexposure and overexposure in bright and backlit situations and allows for low-noise, high-quality images, even in low-light conditions ( for example, in indoor and night scenes).
It should also not be overlooked that Sony’s new solution allows for a structure in which the pixels maintain or improve their current properties, not only for the same size but also in the case of smaller pixels. This opens the doors to a new generation of sensors that will be able to cram a greater number of pixels – therefore have a higher resolution – at the same size, without negatively affecting image quality, but with appreciable advantages also in terms of the design of the future smartphones.
Sony announced the new architecture during the International Electron Devices Meeting (IEEE) which kicked off last Saturday. It is not yet known when it will be integrated into the first smartphones, but it is easy to predict that among the candidate models to use it there will be an Xperia. Moreover, imaging is one of the pillars on which the Japanese manufacturer bases its line of smartphones – see the recent steps taken with Xperia PRO’s.